The present application relates to programmable anti-fuse structures and more particularly to an on-chip programmable anti-fuse structure having reduced breakdown voltage. The present application also relates to a method of forming such a programmable anti-fuse structure.
An anti-fuse is an electrical device that performs the opposite function to a fuse. Whereas a fuse starts with a low resistance and is designed to permanently break an electrically conductive path (typically when the current through the path exceeds a specified limit), an anti-fuse starts with a high resistance and is designed to permanently create an electrically conductive path (typically when the voltage across the anti-fuse exceeds a certain level).
Programmable anti-fuse structures are used in a variety of circuit applications. It is highly desired to fabricate on-chip anti-fuse structures during complementary metal oxide semiconductor (CMOS) fabrication to minimize process costs and improve system integration. In such applications, the gate dielectric and the anti-fuse dielectric are typically composed of a same dielectric material. However, the breakdown voltage of a conventional planar anti-fuse structure with a gate dielectric is typically too high. As such, there is a need for providing improved on-chip anti-fuse structures that avoid the drawbacks mentioned above.